This invention relates generally to digital signal processing, and in a more specific sense to the creation, configuration and implementation of wave digital filter (WDF) structure and activity. As will become apparent to those generally skilled in this art, the various facets, the novel methodology, and the novel structure of this invention are adaptable to a very wide range of applications, just a few of which are specifically, but only generally, mentioned herein.
By way of background regarding this field of technology, most signal-processing systems employ two fundamental types of processing algorithms—fixed-function and data-dependent. Typical signal-processing systems use very high-throughput, fixed-function algorithms for front-end processing, such as band selection filtering or fast Fourier transforming. This front-end processing step is typically followed by the use of data-dependent algorithms for feature extraction and data classification. Front-end processes are typically implemented on high-performance, programmable, digital signal processors (DSPs), and micro-processor based architectures are commonly used to implement the front-end algorithms since they provide great flexibility.
High-performance filter functions are needed in most signal-processing applications. One common use of signal-processing systems is in signal filtering. Typical end-use requirements include decimation and filtering for sigma-delta modulator-based analog-to-digital converters for signal acquisition, for digital sample-rate converters to match signal parameters to various processing algorithms, and for spectral or frequency band analyses and selection for signal extraction.
Classically, finite impulse response filters (FIRs) are used in the above-identified applications. FIRs have the advantage of ease of design and unconditional stability. However, FIRs usually require considerable hardware resources, particularly in high dynamic range, multi-channel systems. Wave digital filters (WDFs) are attractive alternatives in these applications because of their low coefficient sensitivity and simple design. Additionally, by constraining the ratio of a filter's cut-off frequency to the clock rate in a filter algorithm, WDFs with low arithmetic complexity of only one or two multiplications per data input sample may be realized. These types of filters are approximately five to six times more hardware-efficient than the best FIR implementations for a given filter specification. Furthermore, by systematically searching constrained coefficient space, a number of WDF structures have been developed where a multiplication operation reduces to a simple hard-wired binary shift and add operation, an approach which reduces hardware complexity still further.
In this setting, where WDF circuitry is sought to be used as a preferential approach to signal processing, the WDF signal-processing technology of the present invention offers a significant new advance.
In accordance with the present invention, included among the several digital signal-processing advances which are offered by this invention are (1) a newly proposed WDF agency, (2) a newly proposed cascade series arrangement of WDF agencies, referred to herein as a composite WDF, one of which composite-contributing agencies is the just-mentioned, newly proposed WDF agency (1), and (3) a computer-based digital fabricating engine (and related methodology) which operate to generate (realize) on the fly, so-to-speak, by time-based instantiation in time-spaced phases, all of this agency (and agency-composite) structure (also referred to herein as phase-instantiated WDF structure). Among the “WDF agency structure” thus created by this engine, significantly, is a foundation filter “building block” which is referred to herein as a branch of a 5th-Order WDF elliptical filter section. Such a branch, and its different, specific, useful configurations, are illustrated and described hereinbelow in relation to a selected, dedicated drawing figure (FIG. 6) which is presented especially to highlight this feature of the invention. The proposed WDF-based structure and methodology of this invention are simple in construction and implementation, are adaptable to many applications, and offer, generally in the “world” of signal filtering, an impressive, steep (or short, or fast) transition-bandwidth performance which allows for sophisticated operation in, for example, multi-channel filtering environments.
For illustration purposes, a preferred and best-mode embodiment of, and manner of implementing and practicing, the present invention are disclosed herein in the setting of a multi-channel WDF implementation employing a unique, and especially short(fast)-transition-bandwidth, composite WDF made up of two, concatenated WDF agencies, referred to herein as Type-I and Type-II WDF agencies. The Type-II WDF agency discussed herein is one of the new and unique contributions (to the art) of the present invention. As will be seen, it is the fast transition bandwidth of this new Type-II WDF agency which causes the mentioned composite WDF to exhibit the unique and special, overall, fast “composite” transition bandwidth offered by the present invention.
This multi-channel WDF implementation exploits the generally fast-transition bandwidth of WDF technology, and uniquely uses time-division, or time-sliced, multiplexing in the transitory, instantiated forming of various WDF building blocks (functional digital circuitry) to process multiple channels of data using the mentioned, effectively single, composite WDF. In a multiple-channel filtering system, and among many of the advantages offered by the invention, the cost, for example, of an employed arithmetic logic unit (ALU) can be spread over the total number of processed channels. This is possible because the speed of operation of the proposed, new Type-II WDF agency is much faster than counterpart, conventional WDF agencies, due, at least in part, to the new agency's very simple, effective hardware structure. Hence, an ALU which is used with the WDF structure of the present invention can easily and very efficiently be time-multiplexed (sliced) over, and offered transitorily to, a number of input signal channels.
Thus, included among the important and unique contributions of this invention are (1) a new type of fast-transition-bandwidth, decimating WDF agency, referred to herein as a Type-II agency, constructed with four, concatenated (in a cascade series), 5th-Order elliptical signal-processing sections, and (2) a new type of decimating, composite WDF filter which is formed of a concatenated combination (also in a cascade series) of a single Type-II agency, and upstream therefrom, at least one decimating WDF agency, referred to herein as a Type-I agency, constructed with a pair of concatenated 5th-Order elliptical sections. The four elliptical sections in the new Type-II agency include three upstream, non-decimating sections, and a fourth, downstream decimating section. The two elliptical sections in the Type-I agency include an upstream, non-decimating section, and a downstream, decimating section. More than a single Type-I agency may be employed in a composite WDF structure formed in accordance with the invention, and the preferred embodiment of the invention is illustrated herein in a setting which employs four such agencies—concatenated.
Each elliptical section in each type agency is formed with a parallel pair of branches, referred to herein as upper and lower branches, and every such branch includes a twin-summing-node-connected, parallel arrangement formed with a defined Z-transform function block bracketed by a pair of Gamma-factor multipliers. Within each elliptical section, the Gamma factors associated respectively with these “function blocks” in the upper and lower branches are different, but are the same within each branch, per se, and the specific Gamma factors which are associated respectively with the elliptical sections forming the Type-I and Type-II agencies differ from one another. There are four Gamma factors employed herein, and these are referred to as Gamma 1 and Gamma 2 (used in each Type-I WDF agency), and Gamma 3 and Gamma 4 (used in each Type-II WDF agency).
Non-decimating elliptical sections distinguish generally from decimating elliptical sections by the facts that their lower branches (in the non-decimating sections) include an additional, series-connected, Z-function, delay element, and that they possess but a single “input terminal”. Decimating sections do not possess such a delay element, and are characterized, effectively, by a pair of individually, and mutually exclusively, selectable “input terminals”.
Further contributed by the present invention is the earlier-mentioned, computer-based, digital fabricating engine which operates in an on-the-fly, time-sliced manner to instantiate all of the above-discussed signal-processing structure (and functionality) just as such are needed to perform signal processing. A signal presented to the environment of this invention “passes through” that environment in a manner “managed” by this engine so as to be “engaged” by the various branches, sections and agencies mentioned above, and in the correct order, so as to become appropriately processed.
What this engine, thus, does during operation is to create, in effect, a seriatim secession of 5th-Order elliptical-section branches (upper and lower), appropriately ordered in time, and organized, with respect to signal flow, so as to create a succession of whole elliptical sections, which are, in turn, organized in time to produce the correct concatenated arrangement of Type-I and Type-II agencies. This engine can thus be thought of fundamentally as being provided, via code-control instructions, with a basic template for the creation, over a defined time span within a particular extent of time, of 5th-Order elliptical-section branches, and then sequentially furnished with appropriate data informing it (a) whether it is to create a Type-I or a Type-II agency, (b) whether, within such a singularly defined agency, it is to create, during a particular short span of time, a decimating or a non-decimating elliptical section, (c) what appropriate Gamma factor should be used to define the multipliers in the upper and lower elliptical-section branches, and (d), with regard to a lower branch, whether it is to include the above-mentioned, additional Z-function delay element. Effectively, the engine creates these “things” as structural and functional portions of itself between what are referred to herein as signal input and output zones.